UCIe

Universal Chiplet Interconnect Express (UCIe) is an open specification that allows communication between chiplets within a package, enabling an open chiplet ecosystem and ubiquitous interconnect at the package level. It is co-developed by AMD, Arm, ASE Group, Google Cloud, Intel, Meta, Microsoft, Qualcomm, Samsung, and TSMC.[1]

Initial focus
  • Physical Layer: Die-to-Die I/O with industry leading KPIs
  • Protocol: CXL / PCIe for near-term volume attach
  • Well-defined specification: ensure interoperability & evolution

Future goals
  • Additional protocols
  • Advanced chiplet form-factors
  • Chiplet management

UCIe 1.0

The UCIe specification details the complete standardized Die-to-Die interconnect with physical layer, protocol stack, software model, and compliance testing that will enable end users to easily mix and match chiplet components from a multi-vendor ecosystem for System-on-Chip (SoC) construction, including customized SoC. 

Benefits of UCIe 1.0
  • Enables construction of SoCs that exceed maximum reticle size
  • Reduces time-to-solution
  • Lowers portfolio cost (product & project)
  • Enables a customizable, standard-based product for specific use cases
  • Scales innovation (manufacturing and process locked IPs)

References
  1. "About UCIe". My Site. Retrieved 2022-03-31.
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