Comparison of EDA software
Comparison of electronic design automation (EDA) software
Comparison of EDA packages
| Application and developer | Platform | Latest release | License | Schematic? | Simulation? | PCB editing? | User Interface Language(s) | Imports | Exports | Scripting support | |
|---|---|---|---|---|---|---|---|---|---|---|---|
| Version | Date | ||||||||||
| Active-HDL by Aldec | Windows | 10.3 | 2016-03-16 | Proprietary | Yes | Yes | No | en | EDIF, Viewlogic, more | PDF, HTML, Verilog, VHDL, EDIF, Zuken, more | |
| Advanced Design System by Keysight EEsof EDA | POSIX[1] | 2019[2] | 2018-11-15 | Proprietary | Yes | Yes | Yes | en | HSPICE, SPICE, Spectre netlists; Gerber, Excellon, ODB++, artwork; more | HSPICE, SPICE, Spectre netlists; Gerber, Excellon, ODB++, artwork; more | Python, Application Extension Language (proprietary; "AEL") |
| Windows[1] | |||||||||||
| SuSE[1] | |||||||||||
| RHEL[1] | |||||||||||
| Altium Designer (former Protel) by Altium | Windows | 21.5.1[3] | 2021-06-22 | Proprietary | Yes | Yes | Yes | Multilingual | OrCAD, Allegro, PADS Logic, PADS PCB, Expedition, DxDesigner, EAGLE, P-CAD, Gerber, STEP, Solidworks, IDF, more | 3D PDF, Gerber, Gerber X2, Excellon, ODB++, DXF, STEP, OrCAD, EAGLE, more | Delphi, JS, VB |
| Wine | |||||||||||
| CADSTAR, Board Designer, and Visula by Zuken | Windows | 2019.0.0.1 | 2019-11-18 | Proprietary | Yes | Yes, SI & PI | Yes | en | PADS, OrCAD, P-CAD, Protel, DXF, IDF | PDF, Gerber, Excellon, ODB++, DXF, IDF more | COM, macros |
| CircuitLogix by Logic Design Inc. | Windows | 10 | 2019-01 | Proprietary | Yes | Yes | Yes | en | SPICE, Gerber, DXF | SPICE, PDF, Gerber, DXF | |
| CircuitMaker by Altium | Windows | 2 | 2021-07 | Proprietary | Yes | No | Yes | en | Importer Removed since Last Version (1.3) | Gerber, Excellon, DXF, STEP, PDF | None |
| Wine | |||||||||||
| CR-5000 by Zuken | POSIX | 13 | 2011-05-17 | Proprietary | Yes | Yes, SI & PI | Yes | en, jp | EDIF, DXF, IGES, IDF, BSDL, STEP, ACIS, Gerber, Excellon, more | PDF, Gerber, Excellon, ODB++ (must request[4]), DXF, STEP, IPC D-356, IPC-2581, EPS, ACIS | |
| Windows | |||||||||||
| Unix | |||||||||||
| Linux | |||||||||||
| CR-8000 by Zuken | POSIX | 2020 | 2020-06-30 | Proprietary | Yes | Yes, SI & PI, IBIS-AMI/SERDES | Yes | en, jp | EDIF, DXF, IGES, IDF, BSDL, STEP, ACIS, Gerber, Excellon, more | PDF, Gerber, Excellon, ODB++ (must request[4]), DXF, STEP, IPC D-356, IPC-2581, EPS, ACIS | |
| Windows | |||||||||||
| Unix | |||||||||||
| Linux | |||||||||||
| DesignSpark PCB by RS Components | Windows | 9.0.3 | 2020-07-08 | Proprietary | Yes | Yes, Spice | Yes | en | EAGLE, DXF, EDIF | Gerber, Excellon, ODB++, DXF, IDF, PDF, LPKF | |
| DesignSpark PCB Pro by RS Components | Windows | 9.0.3 | 2020-07-08 | Proprietary | Yes | Yes, Spice | Yes | en | EAGLE, OrCAD, Easy-PC, NI Ultiboard, BoardMaker, DXF, PNL, EDIF | Gerber, Excellon, ODB++, DXF, IDF, PDF, LPKF | |
| DipTrace by Novarm | POSIX | 4.2.0.1 | 2021-11-18 | Proprietary | Yes | External (Spice netlist export) |
Yes | 21 languages | Altium, Eagle, KiCad, OrCAD, P-CAD, PADS, Gerber, N/C Drill, DXF, BSDL Pinlist, Netlists | Gerber, Gerber X2, Excellon, ODB++, DXF, Eagle, P-CAD, PADS, OrCAD, IPC-D-356, STEP, VRML, Pick and Place, CSV, BOM | |
| Windows | |||||||||||
| Mac | |||||||||||
| Wine | |||||||||||
| EAGLE by Autodesk/CadSoft Computer | POSIX | 9.6.2 | 2020-05-27 | Proprietary | Yes | Ngspice | Yes | de, en, zh, hu, ru | EAGLE (XML), ACCEL (P-CAD, Altium, Protel), ULTIBOARD, Netlists, BMP, Custom | EAGLE (XML), Protel, Netlists, Images, Gerber, Gerber X2, Excellon, Sieb & Meyer, HPGL, PostScript/EPS, PDF, Images, HyperLynx, IDF, Custom | Proprietary User Language Programming (ULP) |
| Windows | |||||||||||
| Linux | |||||||||||
| Mac | |||||||||||
| EasyEDA | POSIX | 6.4.5 | 2020-08-19 | Proprietary | Yes | Ngspice | Yes | en, fr, de, pl, jp, ru, es, se, ua, zh ... | Altium, EAGLE, KiCad libraries, LTspice .asc/.asy files, JSON, Spice | PDF, PNG, SVG, JSON, Gerber, Excellon, Pick and Place CSV file, CSV-formatted drill chart, Bill of Materials CSV file, Altium netlist, FreePCB netlist, PADS Layout Netlist, Spice netlist. | JSON |
| Windows | |||||||||||
| Linux | |||||||||||
| Mac | |||||||||||
| Chrome OS as a Web application | |||||||||||
| Fritzing | POSIX | 0.9.9[5]  |
2021-09-24 | GPL-3.0-or-later | Yes, + breadboard | No | Yes | en, de, nl, es, it, fr, pt, ru, zh, jp, ... | gEDA symbols, KiCad symbols, SVG | Gerber, DIY etching, BOM, SVG, PDF, EPS | |
| Windows | |||||||||||
| Linux | |||||||||||
| Mac | |||||||||||
| gEDA | POSIX | 1.10.2[6] |
2020-12-22 | GPL-2.0-or-later | Yes | Yes | Yes | en | gschem netlists, image as background | Gerber, Excellon, SVG, PDF, EPS, PNG, GIF, JPEG, Specctra, XYRS | Guile (Scheme) |
| Windows | |||||||||||
| Linux | |||||||||||
| Mac | |||||||||||
| KiCad | POSIX | 6.0.4[7] |
2022-03-18 | GPL-3.0-or-later | Yes | Internal: Ngspice External: SPICE netlist export |
Yes | zh_CN, de, en, es, fr, it, pt, ru, ja, pl, cz | Altium, CadStar, EAGLE (XML), P-CAD, Fabmaster, TinyCAD net lists, OrCAD EDIF | PDF, Gerber, Gerber X2, Excellon, netlist, VRML2, STEP, IDFv3 | Python |
| Windows | |||||||||||
| Linux | |||||||||||
| Mac | |||||||||||
| Micro-Cap (end-of-life) |
Windows | 12.0.2.3 | 2019-11-18 | Proprietary | Yes | Yes | No | en, jp | HSPICE, PSPICE, SPICE3, netlists, Images, IBIS, Touchstone | SPICE text file, netlist, BOM, Protel, Accel, OrCad, PADS netlists, Schematic and Analysis Plots Images, Numeric Output Text, Excel | |
| Wine | |||||||||||
| NI Ultiboard and Multisim by National Instruments | Windows | 14.2 [8] | 2019-05-19 | Proprietary | Yes | Yes | Yes | en | MS*, MP*, EWB, Spice, OrCAD, UltiCap, Protel, Gerber, DXF, Ultiboard 4&5, Calay | BOM, Gerber, Excellon, IGES (3D), DXF (2D & 3D), SVG | |
| Web application[9] | |||||||||||
| OrCAD | Windows | 17.2 | 2016-10 | Proprietary | Yes | Yes | Yes | en | EAGLE, PADS, Altium, STEP, DXF, IDF, IDX, OrCAD SDT, OrCAD Layout,OrCAD | PDF, Gerber, Gerber X2, Excellon drill/route, netlist, ODB++, DXF, IDF, IDX, STEP,3D PDF, IPC2581 | Tcl/TK, SKILL (Lisp) |
| pcb-rnd | POSIX | 3.0.2 |
2021-11-04 | GPL-2.0-or-later | No | external: OpenEMS | Yes | en | gschem netlists, Protel Autotrax, KiCad (legacy & s-expr layouts), EAGLE (XML & v3,4,5 binary layouts), eeschema netlists, mentor netlists, TinyCad netlists, Calay netlist, FreePCB/easyEDA netlist, LT-Spice, MUCS, Mentor Graphics Hyperlynx, image (BMP, JPG, GIF, PNG), HPGL, BXL, Specctra (DSN), PADS | Gerber/[Excellon format|drill],SVG, PDF, EPS, PNG, GIF, JPEG, Specctra (DSN), PADS, Protel Autotrax, KiCad (legacy & s-expr), DXF, FidocadJ, Mentor Graphics Hyperlynx, template configurable XYRS/BOM | Python, lua, perl, tcl, AWK (multiple dialects), lisp & scheme (multiple dialects), javascript, ruby, pascal, BASIC |
| Windows | |||||||||||
| Linux | |||||||||||
| Mac | |||||||||||
| Proteus by Labcenter Electronics Ltd | Windows | 8.14 | 2022-04-01 | Proprietary | Yes | Yes | Yes | en | Gerber, BMP, DXF | PDF, Gerber, GerberX2, Excellon, ODB++, DXF, IDF, PKP, testpoint file, metafile, BMP. | internal script |
| Pulsonix by WestDev Ltd | Windows | 10.0 | 2018-10-01 | Proprietary | Yes | Yes | Yes | en | Allegro, Altium, CadStar, EAGLE, OrCAD, PADS, P-CAD, Protel, Gerber, STEP, DXF, IDF, more | Gerber, Gerber X2, Excellon, ODB++, IPC-2581, PDF, DXF, STEP, IDF, BOM, more | Proprietary language, ActiveX |
| Wine | |||||||||||
| TARGET 3001! | Windows | 30.2.0.63 | 2020-12-14 | Proprietary | Yes | Yes | Yes | en, de, fr | EAGLE, DXF, Gerber, Gerber, Excellon, BMP, CXF, STEP 3D | Gerber, Gerber X2, Excellon, EAGLE, HPGL, G-Code (Milling), CXF, STEP 3D, Excel BOMs, Pick&Place, GenCAD, FABmaster, IPC D-356, Test points, Netlists, OBJ, POV-Ray, PDF | Package generator scripts, BOM scripts, printing and PDF generator scripts, 3D scripts |
| Wine | |||||||||||
| Upverter | POSIX | N/A | 2019-05-10 | Proprietary | Yes | No | Yes | en | Altium, OrCad, PDF, OpenJSON, EAGLE | PDF, Gerber, Excellon, netlist, PADS Layout Netlist, Tempo Automation, Pick and Place CSV, High-Res PNG, STL, CSV-formatted drill chart, CSV-formatted list of all parts | |
| Windows | |||||||||||
| Web application | |||||||||||
| 123D Circuits by Autodesk | POSIX | N/A | Proprietary | Yes, + breadboard | Yes | Yes | en | EAGLE | Gerber | ||
| Windows | |||||||||||
| Web application | |||||||||||
| Application and developer | Platform | Latest release | License | Schematic? | Simulation? | PCB editing? | User Interface Language(s) | Imports | Exports | Scripting support | |
| Version | Date | ||||||||||
Free software
| Name | Architecture | License | Autorouter | Comment |
|---|---|---|---|---|
| Electric | *BSD, Java | GPL-3.0-or-later | Yes | VLSI circuit design tool with connectivity at all levels. Can also be used for schematic entry and PCB design. |
| FreePCB | w32 | GPL | Yes | A printed circuit board design program for Microsoft Windows. FreePCB allows for up to 16 copper layers, both metric and US customary units, and export of designs in Gerber format. Boards can be partially or fully autorouted with the FreeRouting[10] autorouter by using the FpcROUTE Specctra DSN design file translator. |
| Fritzing | Windows, Mac, Linux | GPL-3.0-or-later | Yes | Protoboard view, schematic view, PCB view, Code (firmware) view. Includes customizable design rule checker. Includes common shaped boards like Arduino and Raspberry Pi shields. Allows spline curve traces. Only two layers (top and bottom). Outputs gerbers. |
| gEDA | *BSD, Linux, Mac | GPL-2.0-or-later | Yes | schematic, simulation, PCB editor, gerber view |
| Gnucap | any (C++98) | GPL-2.0-or-later | No | Mixed-signal circuit simulator |
| Icarus Verilog | *BSD, Linux, Mac | GPL-2.0-or-later | No | Verilog simulator |
| KiCad | Linux, Mac, Windows | GPL-3.0-or-later | FreeRouting | Full package for schematic and board design, etc. Design rule checking. User-defined symbols and footprints. Gerber/ drill file creation. Graphic interface. Active user community. |
| KTechLab | Linux | GPL | No | KTechLab is a schematic capture and simulator. It is specifically geared toward mixed signal simulation of analog components and small digital processors. |
| Magic | Linux | BSD license | No | A very-large-scale integration layout tool |
| Ngspice | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | BSD-3-Clause | No | SPICE + XSPICE + Cider |
| Oregano | GPL-2.0-or-later | No | Schematic capture + spice simulation | |
| Quite Universal Circuit Simulator (QUCS) | Linux, Solaris, Mac, NetBSD, FreeBSD, w32 | GPL-2.0-or-later | No | Schematic capture + Verilog + VHDL + simulation |
| pcb-rnd | *BSD, Linux, Mac, w32 | GPL-2.0-or-later | Yes | Circuit layout program with extended file format support, DRC, parametric footprints, query language, and GUI and command line operation for batch processing and automation |
| Verilator | Posix | LGPL-3.0-only or Artistic-2.0 | No | Verilator is the fastest free Verilog HDL simulator. It compiles synthesizable Verilog into cycle accurate C++ or SystemC code following 2-state synthesis (zero delay) semantics. Benchmarks reported on its website suggest it is several times faster than commercial event driven simulators such as ModelSim, NC-Verilog and VCS, while not quite as fast as commercial cycle accurate modeling tools such as Carbon ModelStudio and ARC VTOC. |
| XCircuit | Unix | GPL | No | Used to produce netlists and publish high-quality drawings. |
See also
References
- "ADS Supported Platforms". Archived from the original on 2017-10-15. Retrieved 2015-03-20.
- "PathWave Advanced Design System (ADS) Software | Keysight". www.keysight.com.
- "ALTIUM DESIGNER". ALTIUM-DOWNLOADS.
- "PCB tools supporting ODB++". Artwork.com. Artwork Conversion Software Inc. Retrieved 2011-09-25.
- https://fritzing.org/releases/0-9-9.
- http://ftp.geda-project.org/geda-gaf/stable/v1.10/1.10.2/.
- "KiCad 6.0.4 Release". 18 March 2022. Retrieved 18 March 2022.
- "Upgrade Multisim™ - National Instruments". www.ni.com.
- "Multisim Web App". Archived from the original on 2017-04-19. Retrieved 2017-04-18.
- Wirtz, Alfons (2014-03-08) [2004]. "FreeRouting - Printed Circuit Board Routing Software from FreeRouting.net". Archived from the original on 2017-09-23. Retrieved 2017-09-24.
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